The present invention relates, in general, to components for integrated circuits and the like and, more particularly, to submicron, isolated components having high resistance and low parasitic capacitance for the interconnection of circuit elements having submicron-range dimensions.
One of the limiting factors in the performance of integrated circuits, thin film circuits, or other closely-spaced circuit arrays is the existence of parasitic capacitance between adjacent circuit elements or between such elements and the substrate on which they are located. Such capacitance often inserts unwanted impedances into the connections between adjacent circuit elements to limit the speed of operation and the sensitivity of a circuit, as by changing the time constant of a resistor network. Parasitic capacitance may, for example, limit the ability of a circuit to measure low current values, may adversely affect the response time of a circuit, and in general has adverse effects on overall circuit performance. Such parasitic capacitances often appear in conjunction with resistor networks or single resistors interconnecting circuit components, or may appear between conductors and adjacent structures, and great effort is expended in conventional circuit design to minimize the effects of such parasitics.
As circuit components are reduced in size due to the high demand for increased density, higher operating speeds, and lower costs, the adverse and limiting effects of parasitic capacitance becomes a larger and larger factor, and there is a significant need for improved techniques for reducing or eliminating such effects.
One approach has been the use of thin film technology for the fabrication of circuit elements such as connectors, resistors and the like, but such devices have not satisfactorily solved the problem, since materials such as polysilicon exhibit grain boundary effects and noise.